It's About Time

We care about time. An ongoing effort is to improve the quality of timestamp available to IP cores inside an FPGA to sub-nanosecond precision. One way forward is to use a stable, but not terribly accurate, on-board XO; and then to discipline it to a highly-accurate, but transient, reference from a GPS. Our approach uses a PI servo that is smart about when to freewheel. No magic. Just math.

Agilent 53230A 20pS Counter/Timer

Narcissism of Small Differences

One of Seth's posts, as it often does, got me thinking.

• emacs vs vi
• VHDL vs Verilog
• AXI vs OCP

The good news is that we care. I was going to add "Functional vs Imperative", then reflected, not such a small difference.

NetFPGA-10G and OpenCPI

Xilinx ran an article in their "Xcell Journal" describing NetFPGA-10G and the supporting role of OpenCPI.

At Xilinx Research Labs (Dublin)