V6 - for real this time

We've seen V6 teasers for months now. But it all became real when Avnet (our distributor) delivered V6-LX240T production silicon on ML605s last week. Fortunately, a rainy November weekend meant full steam ahead. I suppose we were expecting more problems. Essentially, everything works. Nice work, team X! Who's next?

More Boards, Less Risk

This morning we successfully ran the the rplTest regressions on an OpenCPI corei7 reference platform with the Xilinx XUPV5-LX110T board. This bench test involved both passive and active DMA roles, host/fpga and fpga/fpga. The tests included swapping out one of two ML555s for an XUPV5; as well as testing the XUPV5 interacting with the GPP alone.

No Code changes were required to achieve this goal!

For the XUPV5-LX110T, we directed the make target in NGDBUILD to link against a Gen1-x1 NGC core (instead of Gen1-x8 core we use with the ML555), and of course, to use the XUPV5-LX110T UCF. Other than the expected, reduced DMA throughput seen with the Gen1-x1 PCIe link, we observed no functional differences. The bitstream build process for the reference oc1001 application took about 35 minutes.

ML555 and XUPV5

Silicon Valley Scramble

We made a go of Silicon Valley this week, visiting academic, EDA and FPGA luminaries of past, present and future. This expedition found us relentless in replaying our OpenCPI message, with our audience actually comprehending the merits of our work. Reconfigurable Computing (RC) is indeed hard. But the values are real and can be measured against the costs. I'm eager to get back to the lab and playout the assets our hosts desire. Eager so that they can measure them, exploit them, critique them, and thus help steer our future.

More ML605 Love

We got our hands on a real ML605 with ES1 silicon for a few days. Real harmony of tools, silicon, and etch. Have to give the loaner back tomorrow. But production boards are around the corner.

Sweet 40nm Fun

FPL 2009 Prague

By all accounts, FPL 2009 in Prague was a success. We were especially excited about the interest in Open-Source for FPGA; both the opportunities and challenges. Fully expect reverberations in this regard to influence FPGA 2010 and FCCM 2010.

High Technology

Steve, Vaughn and Kati at Mustek

Control Plane Grows Up

With the first drop of code out on the OpenCPI website we are doing some cleanup and feature-creep. We decided that the control plane should be able to swallow anything thrown at it; not just well formed 32b and 64b transfers.

An OpenCPI FPGA Hierarchy

ISE 11.2 L.46 Looking Great

We've been having fun with beta versions of the backend tools from our FPGA vendors. Yesterday, ISE 11.2 L.46 went live, bringing V6/S6 builds into the non-NDA public eye. From our V5 ML555 viewpoint, things look great indeed.