The FPGA-facing side of the reconfigurable computing story is mature and ripe for the harvest. FPGA vendors have learned to understand and appreciate specialization; their slow-motion annealing of hardcore memory, processor, and I/O setting the stage for further, application-domain specific innovations. Trump cards, partial reconfiguration just one among them, wait to be played.
The rote productization of these technologies is insufficient. A greater value may be brought to market by understanding and besting competitive technology on their weaknesses and limitations. An army of homogeneous cores represents an opportunity, not a threat, for a reconfigurable computing strategy that can specialize without becoming brittle. GPP and GPU vendors who confront their ISA and coherency limitations head-on will be better able to exploit heterogeneity. Software and tool vendors who recognize RTL as platform byte code, an artifact of a compiler and not a design language, will be similarly advantaged.
Time-to-solution, scale, and correctness are first-class concerns. The multicore market is sufficiently immense such that exploiting its limitations presents a great blue sea and extending its reach has no bound. I wish to be among those who will understand, appreciate and exploit this paradigm-shift in reconfigurable computing; quick, cheap and good, the next great thing.