Thursday, April 28, 2011

FPGA Design Intern Position

Job Title: FPGA Design Intern
Location: Auburn, NH
Stipend: $20/hour
Dates of Position: Flexible
Time Commitment: 3 to 6 months
Reporting To: CTO

Responsibilities: Design, simulation, and test of digital infrastructures and applications. The intern will write, test, and deploy BSV codes that will be contributed to an open-source community. 

  • Bluespec SystemVerilog (BSV) experience (MIT 6.375 or equivalent) (mandatory)
  • Experience with FPGA design and tool flows from Verilog sources (mandatory)
  • Familiarity with RHEL, C, C++, Tcl, Python, Git and MATLAB 
  • Familiarity with OSS projects like and
    Additional Details:
    • The intern may work remotely 
    • This position is non-ITAR; no clearance or US citizenship is required 
    • Atomic Rules builds heterogeneous circuits and systems centered on leading-edge FPGAs. We seek qualified, enthusiastic intern contributors.
      Contact greatminds at atomicrules dot com

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