4DSP FMC116

We have used 4DSP products before. We recommend them to clients. We've evaluated several different models and liked the FMC150 so much, we purchased one to keep. We recently had the chance to work with the FMC116, a 16 channel, 125 MSPS FMC module. We were happy, but not surprised, that it took less than a day to bring up in our lab. This is using their supplied user guide; but our own, homegrown BSV codes. I would not want to say that operationalizing any FMC module is easy; but through the work and doc 4DSP put into this quality product, ... it was! Thanks Pierrick and team!!!

4DSP FMC116 On bench

Vivado 2013.1 / ISE 14.5

Xilinx shipped Vivado 2013.1 last week. If the engineering design and verification community needed any validation that "FPGA CAD Tools are closing ground on their ASIC centric brethren", Vivado is an excellent example. We see so much runway and room to grow here that we've been making proactive investments around nascent aspects of Vivado, such as IP Integrator (IPI). Our efforts in this regard were mentioned in this press release.

While most of our clients are in the heart of design cycles with 28nm silicon; we are also supporting a user base with legacy silicon, particularly Xilinx 6-series, such as the olde-timey, four year old,  ML605 platform. To this end, ISE has bumped from 14.4 to 14.5. We are progressing through our regression tests for OpenCPI and others without drama.

Component Based Design

We've been working with beta versions of Vivado IP Integrator from Xilinx. Taken at baseline, this is a fine way to compose component assemblies of IP. Out of the box, graphically, it feels like a grown-up System Generator for the masses, not just for DSP.

The choice of an industry standard for component metadata, IP-XACT, helps strengthen the value-proposition. (Disclosure: We are observers on the Accellera Technical Committee).

Perhaps our greatest excitement for this technology is the ability to package our own and our client's IP components. In this manner, they too become first-class citizens in an IP catalog standing alongside the IP catalogs of others.

We would be careful about using phrases like "Correct by Construction" or "Plug and Play". But the fact is that well-defined interfaces with strong guards and type-checking help the situation.

Vivado 2012.4 Digilent USB/JTAG with RHEL6 64b

Getting the Digilent bits to work properly with Vivado 2012.4 with RHEL6 64b can be a bit of a dance. Clear webcase reporting to Xilinx is the best way to help drive this issue to ground. Here at AR Auburn, we have refined our procedure for the delta on top of the vanilla 2012.4 install:

Follow the AR42728 . Note that it is now applicable to 14.4/2012.4. The current version of libusb at this writing is 1.0.9, no big deal.

For the next steps, take all the default options...

• cd to /opt/Xilinx/14.4/ISE_DS/ISE/bin/lin64/digilent
• cd to /digilent.adept.runtime_2.9.9-x86_64, run the install script with root permission
• cd to /ftdi.drivers_1.0.4-x86_64, run the install script with root permission
• cd to /libCseDigilent_2.2.10-x86_64, run the install script without root permission

We have found this gets us user (non-root) access for both impact and xsdk with the KC705, VC707, and ZedBoard. If it doesn't work for you, well, there should be a webcase in your future.

Update 2013-06-11: Be sure to look at the updated Xilinx Answer record AR54382. With Vivado 2013.2 just about out the door, this is where you want to start to get your hardware session straight!

Vivado 2012.4

For three weeks now we have been all over Xilinx' release of Vivado 2012.4 . We are excited about this release for several reasons. We have been using 28nm 7-series silicon for sometime with the KC705 and VC707 TDPs; and soon we will increase Zynq's participation in the mix. Although only in beta test at this point, the rapidly maturing functionality of IP Integrator got our attention as well. While running native on RHEL6.3 we've seen zero crashes; and love that we can have any mixture of command-line, scripted and GUI build awesomeness.

Protégé Disassociation Disorder

I dislike the aphorism “all good things must come to pass.” Do they? Really?! Sixteen weeks seemed like it would be a long time when we started; but it passed in a milli-moment. The lab is quieter (I don’t talk to myself much), and even though the sun is shining brightly on the future, there is unquestionably a sadness in such things. Selected solution vector: Go forward and be awesome with the tools and talent we can muster. I like that.
Hit up a recommendation of our erstwhile intern over at LinkedIn.

Christina at work, Fall 2012

Productivity Multiplied

"Productivity. Multiplied." that's the slogan for Xilinx's Vivado tool suite. I wonder if the marketing folk understand that actual multiplication of productivity stems not from the tools; but from those who design, train, support and ultimately use them? We love Vivado, warts and all. When you consider the depth and sophistication of the offering, it is possibly one of the best digital design CAD tool values ever. That it's married up with 28nm series-7 silicon that has been evolving for over a quarter a century doesn't hurt. Add the standardization of AXI interfaces, as opposed to the wild-west with every IP for itself; and the situation looks good.
Mike with Christina, holding the one series-7 platform we have spent almost no time with!