Tuesday, July 29, 2008
Altera, Xilinx, and other Reconfigurable Logic
With both the Altera and Xilinx PCIe Dev Kits up and running, the task turns to working up repeatable measurement practice for both Latency and Throughput. Initially, we will measure to and from main memory (endpoint/root-complex); later we will measure (endpoint-endpoint). The mainboard chipset (AMD 790FX on this platform) has a lot to do with this - but by comparing various endpoint/root-complex observations, we will be able to deduce the individual contributions.
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1 comment:
Hi,
I am an undergraduate student at the National University of Singapore, and in my final year project, I need to make a network of FPGA boards which will be able to communicate with each other over PCI-Express.
With regards to this, I have a few quick questions for you:
1. Is it possible to implement a root complex on a Xilinx FPGA board? If so, where can I find help on how to do so?
2 I am to order the Xilinx boards for this project. Which boards would be the easiest to configure to communicate with each over a PCI-Express switch?
3. What is your best recommendation for a PCI-Express Switch which can be easily configured to be used with FPGAs?
Looking forward to hear from you. You can contact me at my email address - philipjoe@gmail.com
Regards,
Philip
philipjoe@gmail.com
+65-96420773
PS: I am in dire need of guidance. If you would be kind enough to leave your number and time that I could call at, I'd be very very grateful.
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