Wednesday, August 6, 2008

Resting Point

I've advanced the platform to a functional resting point where I've observed both Altera and Xilinx PCIe TLPs making their merry way to and from (790FX) main memory. I haven't taken the interesting next step of having them interact with each other endpoint-endpoint (and measuring that throughput and latency).

Hardware Components (excluding FPGA/PCIe boards):
HSPC Tech Station Open-Air Case, MSI K9A2 (AMD 790FX chipset) motherboard, AMD Athlon64/5000+ Dual-Core CPU, EVGA/Nvidia GeForce 8800GT (512MB) GPU, 4GB PC8500 System Memory, Enermax EMD625A 625W modular Power Supply, Xigmatek 120mm CPU Cooler, Athena SATA 5-drive bay enclosure, 1x 750 GB System disk, 4x 500 GB RAID disks (2 TB Array), Promise raid controller, Sony DVD/CD R/RW Reader/Burner, Planar 21” 1600x1200 LCD DVI monitor, keyboard, mouse, cables.

Platform Blue in the Tech Station Open Case

1 comment:

Philip Joe said...


I am an undergraduate student at the National University of Singapore, and in my final year project, I need to make a network of FPGA boards which will be able to communicate with each other over PCI-Express.

With regards to this, I have a few quick questions for you:

1. Is it possible to implement a root complex on a Xilinx FPGA board? If so, where can I find help on how to do so?
2 I am to order the Xilinx boards for this project. Which boards would be the easiest to configure to communicate with each over a PCI-Express switch?
3. What is your best recommendation for a PCI-Express Switch which can be easily configured to be used with FPGAs?

Looking forward to hear from you. You can contact me at my email address -

PS: I am in dire need of guidance. If you would be kind enough to leave your number and time that I could call at, I'd be very very grateful.