The FPGA Mezzanine Connector (FMC) standard is just starting to become popular. It's said to be "brand new". However work on the concept and specification began in 2005 when FPGA vendors and clients realized that specializing IO for FPGA was a serious challenge. My speculation was that the idea was born in a dialog between David Squires and Craig Lund. They passed the concept along to their respective underlings Sabine Lam and me. On November 16, 2005 over two dozen industry participants came together at the Paramount hotel in Seattle, WA to hash out a standards development roadmap. The team promptly put Malachy Devlin (then CTO and co-founder Nallatech) in the lead role. Throughout 2006 there would be face-face meetings in Monterey, Park City, and Madrid, to work through details not covered in the weekly con-calls. By the end of 2007, the "VITA-57" had become "FMC" (after "XMC", "AMC", etc), and the standard was out for approval. In 2008, VITA placed the documents on their FMC web page. And in 2009 we see the first flush of mezzanines and carriers hitting the market. A lot of work by a broad team to achieve consensus.
Park City, UT
Madrid
Monterey
Sunday, December 13, 2009
Wednesday, December 9, 2009
ISE 11.4 L.68 Looking Great
Like the first winter storm of the season outside our offices, ISE 11.4 L.68 rolled in last night. No issues through our first round of regressions with the OpenCPI oc1001-ml555 baseline. Vendors should follow Xilinx' lead for low-impact, minimally-disruptive minor releases like this.
1500 MHz DAC Pilot Tone
1500 MHz DAC Pilot Tone
Sunday, November 15, 2009
V6 - for real this time
We've seen V6 teasers for months now. But it all became real when Avnet (our distributor) delivered V6-LX240T production silicon on ML605s last week. Fortunately, a rainy November weekend meant full steam ahead. I suppose we were expecting more problems. Essentially, everything works. Nice work, team X! Who's next?
Sunday, October 25, 2009
More Boards, Less Risk
This morning we successfully ran the the rplTest regressions on an OpenCPI corei7 reference platform with the Xilinx XUPV5-LX110T board. This bench test involved both passive and active DMA roles, host/fpga and fpga/fpga. The tests included swapping out one of two ML555s for an XUPV5; as well as testing the XUPV5 interacting with the GPP alone.
ML555 and XUPV5
No Code changes were required to achieve this goal!
For the XUPV5-LX110T, we directed the make target in NGDBUILD to link against a Gen1-x1 NGC core (instead of Gen1-x8 core we use with the ML555), and of course, to use the XUPV5-LX110T UCF. Other than the expected, reduced DMA throughput seen with the Gen1-x1 PCIe link, we observed no functional differences. The bitstream build process for the reference oc1001 application took about 35 minutes.ML555 and XUPV5
Saturday, September 19, 2009
Silicon Valley Scramble
We made a go of Silicon Valley this week, visiting academic, EDA and FPGA luminaries of past, present and future. This expedition found us relentless in replaying our OpenCPI message, with our audience actually comprehending the merits of our work. Reconfigurable Computing (RC) is indeed hard. But the values are real and can be measured against the costs. I'm eager to get back to the lab and playout the assets our hosts desire. Eager so that they can measure them, exploit them, critique them, and thus help steer our future.
Sunday, September 13, 2009
More ML605 Love
Thursday, September 3, 2009
FPL 2009 Prague
Saturday, August 8, 2009
Control Plane Grows Up
With the first drop of code out on the OpenCPI website we are doing some cleanup and feature-creep. We decided that the control plane should be able to swallow anything thrown at it; not just well formed 32b and 64b transfers.
An OpenCPI FPGA Hierarchy
An OpenCPI FPGA Hierarchy
Thursday, June 25, 2009
ISE 11.2 L.46 Looking Great
We've been having fun with beta versions of the backend tools from our FPGA vendors. Yesterday, ISE 11.2 L.46 went live, bringing V6/S6 builds into the non-NDA public eye. From our V5 ML555 viewpoint, things look great indeed.
Sunday, June 21, 2009
OpenCPI Goes Live
We moved closer to our goal of providing a vendor- and substrate-agnostic application container as the OpenCPI website went live last week. Much more on this in the months ahead.
OpenCPI Development - Spring 2009
OpenCPI Development - Spring 2009
Thursday, April 30, 2009
V6 Functional on ML605
Sunday, April 12, 2009
Wednesday, April 1, 2009
Words Matter
Back in 2008 I read an awful, uninformed post on what I had thought to be a helpful and fair technology blog. I took the bait, and wrote a seven paragraph missive in response. Three months later, my response was posted; but it was severely diluted by the editor. While I'm glad my voice was heard, even as a squeak; my truths presented were castrated without any consent. The doc linked below is unedited:
Ref: S.Siegel, 2008-12-26, Letter to John Cooley
Ref: S.Siegel, 2008-12-26, Letter to John Cooley
Thursday, February 26, 2009
FPGA 2009
As Rodger Daltrey exclaims, "The Kids Are Alright". And so too was FPGA 2009. There is more promise than ever. And it really isn't that tough to do better than RTL!
Shep Explains Bluespec SystemVerilog
Shep Explains Bluespec SystemVerilog
Monday, February 2, 2009
Don't Forget the Solder Wick
Our family has a nine year old CRT projector TV, one of the first consumer models that could scan 1080i. It lost red convergence a week ago, and I went a hunting for the fault. I was whining about yanking out the 18 pin power op amp that drives the red sub-coil yoke. Phil provided some motivation. Not just in his default "You are being a Wuss" cheer; but in the observation that there was little downside if I screwed up! That was all I needed to hear. An hour before kickoff, and we were good to go.
IC8C01
IC8C01
Sunday, January 11, 2009
X58 Love
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